Pyrtl_PYNQ

Abstract

This project is an extension feature for Pyrtl, a python based Verilog (hardware file) design library funded by Professor Sherwood. This project uses PYNQ-Z1 (designable hardware board). Our project was aiming for providing the Internet of Things (IoT) developers an easier way to design their Xilinx FPGA board. Originally, IoT developers require to make their own designs with Verilog (a complicated language for hardware design). Then, they use Vivado on their working PC’s to create the design and transform it into an overlay for hardware to read. Lastly, overlays will be put on the Xilinx FPGA boards. We automated this process, so the IoT developers can simply use this Compile-As-A-Service feature to eliminate their time on making complicated designs with Vivado. IoT developers can create and use their design at one run with Pyrtl_PYNQ.